Xilinx IP core drivers for RTEMS- diff attached
kjrobert at alumni.uwaterloo.ca
Tue Dec 5 17:17:23 CST 2006
>>> Greg wrote:
>>> I hesitate to just check them in as some of the changes related to
>>> uarts, fpu and memory map are highly idiosyncratic and I don't
>>> want to mess up other people's work. I think a compromise patch
>>> might make the most sense, where I set up a diff that preserves
>>> the general character of the bsp; base addresses, etc.. but gets
>>> in the updated drivers.
>> Keith wrote:
>> I'm in favour of this being checked straight into a new xilinx or
>> virtex 405 bsp. This could be a straight branch of the gen405 bsp
>> with the combination of your and my changes applied. This can be done
>> without breaking any existing clients and allows us a simpler
>> merge/update procedure. Does this sound ok to you?
> Pete wrote:
> I also vote for a separate BSP.
> Is the MAC in the BSP the soft one or the hard-wired one? If the
> former, is anyone working on the hard one? If not, maybe we'll take a
> stab at it, once we've got this one up. I haven't done more than
> scan the Xilinx docs about it. Is the existing one a good model to
> start from?
The emac currently in the bsp is the soft core one. I have a definite
requirement to implement a driver for the hard core one in the virtex
4fx. I plan to do this early next year, unless someone else gets there
The hard core emac is considerably different. Certainly different
enough to be a new driver. However, one could definitely use the
existing driver as a guide. IMHO, there was a number of conceptual
problems (in addition to it costing several thousand dollars!) with the
old emac. Thankfully, these appear to be sorted out in the new hardcore
From my glances through the specs, I plan to connect this through the
alternate dcr bus to reduce contention on the plb. The hardcore emac
appears to be configurable to support either. Anybody have a preference
for either configuration?
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