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Paging on SPARC



Hello there,

For a specific application I am working on, I was able to use the
implementation of paging with a one-to-one mapping for Intel
(c/src/lib/libcpu/i386/page.c) to achieve some degree of protection. I
would like to port that application for SPARC now, and for that
purpose port the aforementioned implementation of paging from Intel to
SPARC (still with one-to-one mapping). At a first look, it is pretty
straightforward (the only broad differences being an additional level
of descriptors and minor processor specifics like control registers),
but I would like to hear from people out here possibly more
experienced at this than myself:

- Can there be an additional issue or impediment for this porting?
- Has anyone done something on this matter (attempt or sucess), from
which experience I might learn?

Thank you in advance.

Best regards,
Jo?o Craveiro