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Adding New Hardware Interrupts



Thomas D?rfler wrote:
> No, as Joel pointed out, you should use the rtems_irq_* set of
> functions, due to the (no longer so) new exception handling concept.
>   
Okay, will do - I'm glad I asked!  But where are these documented?

> Ok, we already built in a tweak to handle the additional stuff, although
> I am not sure whether it does all it should do.
> If you look into c/src/lib/libbsp/powerpc/virtex/irq/irq.h , you will
> find, that we already import a defintion from your Xilinx EDK named
> "XPAR_INTC_MAX_NUM_INTR_INPUTS". If this is set to the real maximum of
> all your FPGAs, then the irq handler functions are already aware of the
> additional IRQ inputs and should treat them properly. So if you have a
> total of 20 lines routed to your obpintc, (?), then you should be able
> to install an interrupt handler for the highest IRQ source using the
> following interrupt number:
>
> BSP_OPBINTC_IRQ_LOWEST_OFFSET+19
>   
Okay, that should be workable.  I will have to rebuild my BSP, though, 
as the number of interrupts has increased.  Without looking (yet) at the 
code, I suppose the only cost to making that number largish is the size 
of table or two, right?

> What is still missing is a set of definitions to give nice names to
> these interrupt inputs and their numbers, but since you want to treat
> them on application level, you should also name them their. So we might
> find things like that in your code later:
>
> appl_io.h
>
> #define APPLIO_SPI1_IRQNUM (BSP_OPBINTC_IRQ_LOWEST_OFFSET+4)
> #define APPLIO_SPI2_IRQNUM (BSP_OPBINTC_IRQ_LOWEST_OFFSET+5)
> #define APPLIO_UART13_IRQNUM (BSP_OPBINTC_IRQ_LOWEST_OFFSET+6)
>   
Yes, of course!  ;-)

> ...
>
> Does this make sense for you?
>   
Yes, it does.  Your approach is certainly workable.  I do, of course, 
dream of a world where the Virtex BSP is as component-driven as the EDK 
peripheral model, but that is a lot more work; and right now, the 
current project deadlines are breathing down my deck  ;-)

Thanks, guys!
-Bob