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gettimeofday seconds rollover problem?



On Feb 27, 2006, at 10:18 AM, Joel Sherrill wrote:
>
>
> I liked the suggestion that the memory barriers be added to the ISR  
> level wrappers not the
> CPU specific implementations.

Till has performance concerns about this.   I kind of agree that if  
it is sufficient that only volatile variables are modified inside a  
disabled section then there's no real need to add the barriers.

>
> You noted that cc needed to be added to the m68k which has to be  
> CPU dependent.

I'm not sure that this is really necessary.  I don't think that the  
compiler can really assume anything about the condition codes anyway.

>
>> 3) Are the "memory" barriers going to be added to the   
>> _Thread_Dispatch_disable/enable macros?     If so, by whom and why  
>> do  the arguments against adding the barriers to the interrupt  
>> macros not  apply here as well?
>>
> I think the memory barriers need to be added to those macros given  
> the argument.  We don't want something
> moved outside any critical section so we need to draw our own  
> Maginot Line.  I hope ours works well though. :)

The "if it is sufficient that only volatile variables are modified  
inside a disabled section then there's no real need to add the  
barriers" argument applies here, too.  Of course that assumes that we  
figure out the exhaustive list of variables that need to be declared  
volatile.  I think that Joel had a good start on this list.

-- 
Eric Norum <norume at aps.anl.gov>
Advanced Photon Source
Argonne National Laboratory
(630) 252-4793