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Re: Bad volatile -mstrict-align code on powerpc on 4.0.2?

On Nov 6, 2005, at 4:43 PM, Till Straumann wrote:

IMO it is better coding practice to use in_be16/out_be16 (or
ld_be16/st_be16 if you are sure you don't need the eieio)
for memory-mapped device register access.

It turns out I do need eieio. Which is too bad for my legacy code. I have something like this:

volatile struct st_reg {
   int muxsel;
   int value; } *reg = (volatile struct st_reg *)0xa000;

int mv = reg->muxsel;
reg->muxsel = mv|0x01;
int value = reg->value;

and the read of value is happening before the write of muxsel without the eieio. With the eieio it works properly (verified on a bus analyzer).

The compiler shouldn't reorder those since the struct is volatile. Is there a setting for the VME bus interface to prevent this? I'd expect a read through the same bus mapping to block until all writes flushed.

Again, this is to help support legacy code, not to discuss how to do it properly.