[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: ppc multlibs and BSP removal was Re: powerpc altivec support



"Joel Sherrill <joel@OARcorp.com>" <joel.sherrill@OARcorp.com> writes:
> I know this is going to stir up some discussion BUT here goes nothing.
> 
> Is there anyway that the PowerPC exception code can be general up to
> a certain point and then invoke a BSP specific routine to peek for other
> interrupts? The MIPS has a general handler code which does general
> register saving and then invokes a method provided by the CPU model or
> BSP to figure out the interrupt source.
> 
> This allows sharing the complicated assembly code and provides a
> standard hook to decode PICs. The vector decoding source can be in C
> or assembly. On the MIPS this is nice since some of the decoding
> source is complicated. It is a tad bit slower but worth it for
> maintenance.

That definitely could be done on PowerPC using either new or old
exception processing.

In fact, considering new exception processing as most used nowadays, the
only questions is who will take those 5 almost identical irq_asm.S files
and carefully merge them into single one found in 'shared'. I can't do
that reliably as I have no easy way to test even single target. Well,
I'm not very motivated either as I don't use the new model. Till?

Moreover, on PowerPC even initial exception vector decoding could be
done in a unified manner as it happened to be with the old exception
processing (and has been thrown away in the new one for some reasons
beyond my understanding). Then, a BSP/CPU variant can install it's own
exception management routine as an external IRQ exception manager. That
routine would decode the PIC(s) (if any) and dispatch to corresponding
application interrupt management routine. At least it's how I do it in
my old exception processing based BSPs.

Please note that the above scheme works better when exception handlers
and interrupt handlers are considered to be different beasts. Lacking
corresponding support in RTEMS, all my BSPs provide separate
'extIrqSetHandler()' routine that installs interrupt handlers
(enumerated separately from PowerPC exceptions) along with
extIrqDisable()/extIrqEnable(). Exception handlers (including
installation of BSP/CPU-specific external interrupt decoder) are
installed by usual RTEMS methods.

-- 
Sergei.