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mbar and bus error
- Date: Mon, 23 Feb 2004 14:24:53 +0100
- From: sebastian.ssmoller at gmx.net (sebastian ssmoller)
- Subject: mbar and bus error
On Mon, 23 Feb 2004 15:33:35 +0100
Mirko Markov <mmarkov at dkts.co.yu> wrote:
> sebastian ssmoller wrote:
> >during the last days i tried to access MBAR on my board (68360/040).
> >without any success. even read access causes a bus error :(
> >i reread the doc of my board and the quicc (6.8, 9.2, 4.4.3, 6.9.1, aso)
> >and i guess the initialisation sequence i use is correct.
> >i also downloaded the linux kernel (2.6.3) and had a look at the init
> >sequence used there - it is more or less the same.
> >i googled around for some hours - the sample code/doc i found uses the
> >same init seq as rtems/linux/my test prog.
> - In my experience, it is not possible to access the value of MBAR
> register from
> user space memory. When you are reading the value of MBAR you must set
> sfc to
i thought i did:
moveq #7,d0 | CPU-space funcction code
movec d0,dfc | Set destination function code register
movec d0,sfc | Set source function code register
> - Also, I don't see that you reconstruct the value of sfc register
> after writing the MBAR?!?
ok i'll change this
> - Also are you sure that the reset line to the quicc is deactivated.
> After reset the slave quicc
> is held in reset state, until you put it out of reset (look at port
> a/b/c pins)
i'll check this ...
> - One more thing, by default, the watchdog on quicc is enabled, causing
> the reset of quicc, and
> if the reset lines are wired together, reset of main processor, even if
> quicc works as the
> slave. So be sure that you set the value of SYPCR register so that the
> watchdog is disabled
> (for example, set SYPCR to 0x4f).
rtems sets sypcr to 0xec but this doesnt seem to have any effect anyway. i
tried 0x4f - no success.
> Hope this helps,