[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Multiple dec2114x units on ppc

Joel Sherrill wrote:

> I don't know the exact interrupt structure the board has but 
> we found that a PowerPC BSP almost has to support being able to
> have an "ISR handler" that is in fact a second level vectoring
> routine.  THe case I am thinking of is a PMC module that has about
> 15 interrupt sources on it.  It is mapped to a single IRQ to the
> baseboard which is in turn off of an IRQ.  You get one interrupt
> that says "something on the PMC wants attention" and it is up to 
> "PMC specific vectoring routine" to figure out which one.  

I do agree with Joel. On 8XX, for example, the SIU get a single 
interrupt for all CPM interrupts. The generic CPM interrupt then decides 
which interrupt is really occurring and call the handler provided by the 
user. You could implement that by connecting a specific interrupt to the 
SIU, this specific interrupt could offer a second level API to connect 
only CPM interrupts...

However, I think that in order to simplify the developer works, 
providing an homogeneous API is more simple, while more complex for BSP 
designer. I also have seen a request to have a unified irq name space on 
each board...

Concerning CPCI, PCI interrupt routing on PPC, I would suggest to see 
the low level initialization of linux irq routing that indeed does (or 
at least did) change/remap/reorganize the way PCI interrupt are 
delivered... But indeed IRQ sharing for PCI devices is IMHO mandatory...

-- eric