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Processor Load



> -----Original Message-----
> From: leonp at plris.com [mailto:leonp at plris.com]
> Sent: 26 September 2000 16:38
> To: Nick.SIMON at syntegra.bt.co.uk
> Cc: rtems-users at oarcorp.com
> Subject: RE: Processor Load
> 
> 
> At 15:07 26/09/2000 +0100, you wrote:
> >This is a bit h/w dependent, but how about using a spare 
> timer?  Timer ISR
> >looks at the interrupted address, increments idle counter if 
> in idle task,
> >busy counter otherwise.  You'd have to ensure the period of 
> this timer
> >didn't have common factor with other regular system events 
> or your results
> >would be distorted by synchronisation.  Make it a prime 
> number of system
> >clocks and you're laughing.
> (I forgot to mention that I used PIT timer to count one minute..)
> 
> Your method should work fine, I think. The only one problem, 
> that it has, 
> IMHO, is it's inaccuracy - 1 tick. So, if your task 
> scheduling (because of 
> your definitions or outside world behavior) works so, that 
> there is a task 
> which works 0.1% of time but exactly at the moment the 
> TimerISR occurs, it 
> will measure full load. Or I have missed something?
> 
> 
> Leon Pollak
> leonp at plris.com
>


I had in mind a *hardware* timer, running independently of the O/S tick - my
mindset springs from mpc860 which has more on-chip peripherals than you can
shake a stick at.  Youre quite right in that doing it on the O/S tick would
produce deceptive results, as that'd be just the time to start something
waiting on a timer! 



-- Nick Simon