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PowerPC FP handling weakness.
- Date: Fri, 29 Sep 2000 10:17:49 -0500
- From: joel.sherrill at OARcorp.com (Joel Sherrill)
- Subject: PowerPC FP handling weakness.
Eric Valette wrote:
> Sergei Organov wrote:
> > Eric Valette <valette at crf.canon.fr> writes:
> > [...]
> > > Why don't you send a patch that does deffered FPU registers saving... In
> > > that case enabling FP by default is a non problem since if a task does
> > > not use the FPU registers they will not be saved on context switch just
> > > when a flotating point execption processing occurs because FPU usage has
> > > been disabled...
> > I believe that there is no need for such a patch because RTEMS supports
> > deferred FPU registers saving for a long time. The problem is that current
> > 'printf' implementation does use FP, and it will cause problems when you call
> > 'printf' from non-FP task. Enabling FP bit in MSR for non-FP task just hides
> > the problem and doesn't solve it. Or maybe I don't understand what you are
> > saying?
> I'm affraid deffered FPU context switching has never been tested on
> 60x/7xx. Maybe I can be wrong...
I think that in a system where all tasks are FP deferred switching is
equivalent to on every switch. Think about it. All deferred switching
says is that we won't save the context until another FP task is switched
in. This is every time. Not as clear as it should be but technically
> / ` Eric Valette - Canon CRF
> /-- __ o _. Canon Development Europe Team Leader
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Joel Sherrill, Ph.D. Director of Research & Development
joel at OARcorp.com On-Line Applications Research
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